Prescient research to enable energy-efficient microarchitectures stands the Test of Time

Written by
Scott Lyon
Nov. 29, 2023

A microarchitecture technique first developed by Princeton researchers in 2002 has won the MICRO Test of Time Award from the Association for Computing Machinery (ACM) SIGMICRO community, highlighting the researchers’ prescient insights about the realities of power consumption in high-performance computing.

At the time, computing clusters and data centers were relatively new. “Microprocessors are becoming increasingly interconnected,” the authors wrote. The field had created a rich body of research on power-efficient processors and memories. But a blind spot had developed. “There needs to be a similar drive towards better understanding the power consumed by routers and links, the basic components of an interconnection network.”

The researchers introduced a simulator that provided detailed information on both power consumption and performance in the design of server blades and systems-on-a-chip (SOCs). The technique allowed architects to quickly assess the power-performance tradeoff of their interconnection network designs, paving the way for the more advanced microarchitectures of today.

This paper was the first to address the need for studying architectural-level mechanisms to enhance the power efficiency of on-chip interconnection networks,” according to the ACM award citation. The paper has garnered over 1000 citations to date. The Test of Time Award recognizes the most influential papers published at prior MICRO conferences, 18 to 22 years before, that have had significant impact on the field.

The research was led by Li-Shiuan Peh, then an assistant professor of electrical engineering at Princeton and now Provost’s Chair Professor of Computer Science at the National University of Singapore, and her faculty collaborator Sharad Malik, the George Van Ness Lothrop Professor in Engineering and a professor of electrical and computer engineering.

The paper, “Orion: A Power-Performance Simulator for Interconnection Networks,” was first published in 2002 in the Proceedings of the 35th annual ACM/IEEE international symposium on microarchitecture (MICRO 35). In addition to Peh and Malik, the authors include Hang-Sheng Wang and Xinping Zhu, who were graduate students at the time of the paper’s publication.