In the modern world at the end of physical scaling, computer architecture optimizations are a cornerstone for future computing performance improvements. To evaluate their processor and computer system designs, engineers have traditionally strived to maximize performance metrics while minimizing power consumption and die areas. However, a major influence on chip design is that cutting-edge semiconductor design and manufacturing has always been a tremendously complex and expensive endeavor; power consumption and die areas are ultimately proxies for operating and manufacturing costs respectively. Furthermore, the crucial importance of integrated circuits (also called “chips”) has been highlighted in recent history by semiconductor shortages, geopolitical tensions, and global climate change, as well as corresponding economic policies that address these challenges.

This thesis investigates how these novel economic constraints fundamentally change how chip and computing system architectures are optimized compared to only evaluating against traditional performance metrics. First, this thesis investigates how semiconductor manufacturing and supply chains are vulnerable to disruptions. This work introduces a time-to-market model and Chip Agility Score (CAS) to show how a chip’s architectural features affect its time-to-market and supply chain agility respectively and allows computer architects to quantify performance, cost, and supply chain-related tradeoffs.

Second, this thesis investigates how advanced computing sanctions placed performance restrictions on hardware designed for machine learning and large language models. This work demonstrates how these regulations ultimately influence chip architectures and shows how chip architectures can be further optimized while complying with regulations, and proposes an architecture-first approach to designing effective and practical regulations of computing hardware.

Third, this thesis investigates how institutions reason about computing sustainability, performance, and cost tradeoffs. This work combines fine-grained data center, on-premise solar, and power grid data, carbon models, and economic utility analysis to create a framework to evaluate how optimal hardware architectures change under different sustainability-cost preferences.

By incorporating economic constraints into conventional performance evaluation, this thesis furthers our understanding of computer architecture in an uncertain world.

Adviser: David Wentzlaff

Zoom Mtg: https://princeton.zoom.us/j/93820457950?pwd=nnNIeME8uUq18PvJq6lNcJFqmNv…